Provides low-level firmware guidance for AVR MCUs, focusing on memory constraints, interrupts, and peripheral setup.
Install
mkdir -p .claude/skills/avr && curl -L -o skill.zip "https://agentskills.codes/api/skills/download/19342" && unzip -o skill.zip -d .claude/skills/avr && rm skill.zipInstalls to .claude/skills/avr
Activation
This is the description your AI agent reads to decide when to run this skill — the better it matches your request, the more reliably it fires.
AVR firmware — MCU identification, ISR safety, peripheral configuration, memory constraints, and debugging.Key capabilities
- →Identify MCU model and toolchain requirements
- →Configure timer prescalers and peripheral registers
- →Implement ISR safety using atomic blocks
- →Manage memory usage with PROGMEM
- →Plan debugging using serial logs or simulators
How it works
It provides a reference for low-level constraints and a workflow for configuring Atmel AVR hardware, including memory management and interrupt safety.
Inputs & outputs
When to use avr
- →Configure MCU timers and interrupts
- →Optimize firmware for memory constraints
- →Debug UART/SPI peripheral settings
- →Manage ISR atomic blocks
About this skill
AVR (Atmel) Firmware (Elite)
When to use
-
You write/debug AVR firmware (Arduino-class MCUs).
-
You need low-level constraints: timers, interrupts, IO, memory.
Memory Constraints Reference
| Resource | Constraint |
|---|---|
| Flash | Read-only at runtime; constants in PROGMEM |
| SRAM | Stack + heap share; fragmentation risk |
| EEPROM | Limited writes (~100k cycles); use eeprom_update_* |
| Registers | 32 general-purpose (r0–r31); r26–r31 as X/Y/Z pointers |
Workflow
1. Identify target
-
MCU model (ATmega328P, ATtiny85, etc.), clock frequency, toolchain (avr-gcc/avrdude).
-
Fuse bits and programmer type.
2. Interrupt strategy
-
Keep ISRs minimal: set flag/update variable, return.
-
Protect shared data with
ATOMIC_BLOCK(ATOMIC_RESTORESTATE). -
Never block or call malloc/free inside ISRs.
3. Timing and peripherals
-
Calculate timer prescaler for target frequency: $f_{timer} = \frac{f_{cpu}}{prescaler}$.
-
Configure UART/SPI/I2C via register settings; validate baud rate error < 2%.
4. Memory discipline
-
Use
PROGMEMandpgm_read_*for large read-only data. -
Track stack depth; add stack canary in debug builds.
-
Avoid dynamic allocation (
malloc/free) in constrained firmware.
5. Debug and verify
-
Serial logs (UART
printf), AVR simulator (simavr), JTAG if available. -
Minimal test harness with known inputs and observable outputs.
Self-check
-
ISRs are minimal (set flag only, no blocking calls).
-
Shared data between ISR and main loop protected with
ATOMIC_BLOCK. -
Stack depth estimated and verified (no overflow risk).
-
Large constants moved to
PROGMEM. -
Timer/baud calculations validated against actual clock frequency.
Outputs
-
Firmware architecture checklist.
-
ISR safety checklist.
-
Debugging and verification plan.
Prerequisites
Limitations
- →ISRs must be minimal
- →Avoid malloc and free in ISRs
How it compares
It focuses on hardware-specific constraints like register settings and memory limits rather than general software development practices.
Compared to similar skills
avr side by side with the closest alternatives in the catalog.
| Skill | Installs | Updated | Safety | Difficulty |
|---|---|---|---|---|
| avr (this skill) | 0 | 2mo | No flags | Advanced |
| python-error-handling | 1 | 2mo | No flags | Intermediate |
| debugging-streamlit | 7 | 4mo | Review | Intermediate |
| effect-patterns-error-handling | 1 | 6mo | No flags | Advanced |
Try saying
Example prompts that trigger this skill in your AI assistant.
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